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3.2 multi-standard 185fsrms 0.3-to-28Gb/s 40dB backplane signal conditioner with adaptive pattern-match 36-Tap DFE and data-rate-adjustment PLL in 28nm CMOS.

, , , , , , , , , , , , , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)

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