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Analysis of Sheet Dimension (W, L) Dependence of NBTI in GAA-SNS FETs., , , , , , and . IRPS, page 1-8. IEEE, (2021)Impact of Gate Stack Thermal Budget on NBTI Reliability in Gate-All-Around Nanosheet P-type Devices., , , , and . IRPS, page 1-6. IEEE, (2023)NBTI Impact of Surface Orientation in Stacked Gate-All-Around Nanosheet Transistor., , , , , , , , , and . IRPS, page 1-6. IEEE, (2020)Bias Temperature Instability Reliability in Stacked Gate-All-Around Nanosheet Transistor., , , , , , , , , and 2 other author(s). IRPS, page 1-6. IEEE, (2019)Analysis of BTI, SHE Induced BTI and HCD Under Full VG/VD Space in GAA Nano-Sheet N and P FETs., , , , , and . IRPS, page 1-6. IEEE, (2020)A new technique for evaluating stacked nanosheet inner spacer TDDB reliability., , , , , , , , and . IRPS, page 1-5. IEEE, (2020)TDDB Reliability in Gate-All-Around Nanosheet., , , , , , , , and . IRPS, page 1-6. IEEE, (2021)SiGe Gate-All-around Nanosheet Reliability., , , , , and . IRPS, page 60-1. IEEE, (2022)