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TBM: Twin Block Management Policy to Enhance the Utilization of Plane-Level Parallelism in SSDs., , and . IEEE Comput. Archit. Lett., 15 (2): 121-124 (2016)ITAP: Idle-Time-Aware Power Management for GPU Execution Units., , , , , , , , , and . ACM Trans. Archit. Code Optim., 16 (1): 3:1-3:26 (2019)Design for scalability in enterprise SSDs., , and . PACT, page 417-430. ACM, (2014)Application-Aware Topology Reconfiguration for On-Chip Networks., , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (11): 2010-2022 (2011)Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration., , , , , , , , , and . MICRO, page 298-311. IEEE Computer Society, (2018)Dataplant: In-DRAM Security Mechanisms for Low-Cost Devices., , , , , , , , , and 6 other author(s). CoRR, (2019)Performance Evaluation of Dynamic Page Allocation Strategies in SSDs., , , and . ACM Trans. Model. Perform. Evaluation Comput. Syst., 1 (2): 7:1-7:33 (2016)Virtual Point-to-Point Connections for NoCs., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (6): 855-868 (2010)An efficient dynamically reconfigurable on-chip network architecture., , and . DAC, page 166-169. ACM, (2010)Network-on-SSD: A Scalable and High-Performance Communication Design Paradigm for SSDs., , and . IEEE Comput. Archit. Lett., 12 (1): 5-8 (2013)