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The IBM Blue Gene/Q interconnection network and message unit., , , , , , , , , и . SC, стр. 26:1-26:10. ACM, (2011)A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor., , , , , , , , и . ISSCC, стр. 398-399. IEEE, (2007)A 16-bit, low-power microsystem with monolithic MEMS-LC clocking., , , и . ASP-DAC, стр. 94-95. IEEE, (2006)Soft Error Resiliency Characterization on IBM BlueGene/Q Processor., , , , , , , , , и 2 other автор(ы). ASP-DAC, стр. 385-387. IEEE, (2014)DSP architecture for cochlear implants., , , , , и . ISCAS, IEEE, (2006)Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache., , , , , , и . CGO, стр. 179-190. IEEE Computer Society, (2005)14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC., , , , , , , , , и 36 other автор(ы). ISSCC, стр. 254-256. IEEE, (2024)Increasing the number of effective registers in a low-power processor using a windowed register file., , , , , , и . CASES, стр. 125-136. ACM, (2003)Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking., , , , , и . ISCAS, IEEE, (2006)A 16-bit low-power microcontroller with monolithic MEMS-LC clocking., , и . ISCAS (1), стр. 624-627. IEEE, (2005)