Author of the publication

A unified approach to topology generation and optimal sizing of floorplans.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (2): 126-135 (1998)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Fault diagnosis in reversible circuits under missing-gate fault model., , , and . Comput. Electr. Eng., 37 (4): 475-485 (2011)On the representation of a digital contour with an unordered point set for visual perception., , and . J. Vis. Commun. Image Represent., 22 (7): 590-605 (2011)Construction of isothetic covers of a digital object: A combinatorial approach., , and . J. Vis. Commun. Image Represent., 21 (4): 295-310 (2010)On Finding Shortest Isothetic Path inside a Digital Object., , , and . IWCIA, volume 7655 of Lecture Notes in Computer Science, page 1-15. Springer, (2012)Finding the Orthogonal Hull of a Digital Object: A Combinatorial Approach., , , and . IWCIA, volume 4958 of Lecture Notes in Computer Science, page 124-135. Springer, (2008)On representing a simple polygon perceivable to a blind person., , , , , , and . Inf. Process. Lett., (2017)Fault Coverage of a Test Set on Structure-Preserving Siblings of a Circuit-Under-Test., , , , and . ATS, page 25-30. IEEE, (2019)COMEDI: Combinatorial Election of Diagnostic Vectors From Detection Test Sets for Logic Circuits., and . IEEE Trans. Very Large Scale Integr. Syst., 25 (4): 1467-1476 (2017)BIST Design for Detecting Multiple Stuck-Open Faults in CMOS Circuits Using Transition Count., , and . J. Comput. Sci. Technol., 17 (6): 731-737 (2002)A heuristic method for obstacle avoiding group Steiner tree construction., , , , and . SLIP, page 21. ACM, (2012)