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Disambiguation of "hoon Lee, Seung"

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16-Mb synchronous DRAM with 125-Mbyte/s data rate.

, , , , , , , , , , , , and . IEEE J. Solid State Circuits, 29 (4): 529-533 (April 1994)

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Chul-Hoon Lee

Seung-Hyeob Lee

Woo Seung Lee

Song Hoon Lee

Jae-Hoon Lee

 

Other publications of authors with the same name

A 10b 1MS/s-to-10MS/s 0.11um CMOS SAR ADC for analog TV applications., , , , , , , , and . ISOCC, page 124-127. IEEE, (2012)A 10-b 320-MS/s Dual-Residue Pipelined SAR ADC with Binary Search Current Interpolator., , , , , and . CICC, page 1-4. IEEE, (2019)Content Distribution in VANETs Using Network Coding: The Effect of Disk I/O and Processing O/H., , , and . SECON, page 117-125. IEEE, (2008)Image based rainfall amount estimation for auto-wiping of vehicles., , , , and . Neural Comput. Appl., 34 (18): 15543-15554 (2022)Variable Duty Control in Two-Mode LDC for Soft-Change at the Mode Transient., , and . IEEE Trans. Ind. Electron., 70 (1): 364-372 (2023)Two-Mode Low-Voltage DC/DC Converter With High and Wide Input Voltage Range., , , , and . IEEE Trans. Ind. Electron., 68 (12): 12088-12099 (2021)A 10-b 150-MSample/s 1.8-V 123-mW CMOS A/D converter with 400-MHz input bandwidth., , , , and . IEEE J. Solid State Circuits, 39 (8): 1335-1337 (2004)A 10-bit 400-MS/s 160-mW 0.13-μm CMOS dual-channel pipeline ADC without channel mismatch calibration., , , , and . IEEE J. Solid State Circuits, 41 (7): 1596-1605 (2006)Area-Efficient Time-Shared Digital-to-Analog Converter With Dual Sampling for AMOLED Column Driver IC's., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (10): 3227-3240 (2018)A Programmable 0.8-V 10-bit 60-MS/s 19.2-mW 0.13-mu m CMOS ADC Operating Down to 0.5 V., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (4): 319-323 (2008)