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Efficient adaptive load balancing approach for compressive background subtraction algorithm on heterogeneous CPU-GPU platforms., , , , , and . J. Real Time Image Process., 17 (5): 1567-1583 (2020)A domain-specific high-level programming model., , and . Concurr. Comput. Pract. Exp., 28 (3): 750-767 (2016)Online Class Incremental Learning with One-Vs-All Classifiers for Resource Constrained Devices., , , and . ISPA, page 1-6. IEEE, (2023)A Visual Programming Model to Implement Coarse-Grained DSP Applications on Parallel and Heterogeneous Clusters., , and . Euro-Par Workshops (1), volume 8805 of Lecture Notes in Computer Science, page 141-152. Springer, (2014)Hardware Communication Refinement in Digital Signal Processing., , , and . FDL, page 177-185. ECSI, (2006)Pipelined Memory Controllers for DSP Applications Handling Unpredictable Data Accesses., , , and . ISVLSI, page 268-269. IEEE Computer Society, (2005)Using Fitts' Law to Compare Sonification Guidance Methods for Target Reaching Without Vision., , , and . VISIGRAPP (1): GRAPP, HUCAPP, IVAPP, page 444-454. SCITEPRESS, (2024)C-based rapid prototyping for digital signal processing., , , , , and . EUSIPCO, page 1-4. IEEE, (2005)Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design., , and . IEEE International Workshop on Rapid System Prototyping, page 240-243. IEEE Computer Society, (2005)Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis., , and . IEEE Trans. Very Large Scale Integr. Syst., 16 (11): 1454-1464 (2008)