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Disambiguation of "Kooli, Maha"

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Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization.

, , , , , , , and . ISLPED, page 121-126. ACM, (2020)

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Nihel Kooli

Maha Torjman

Maha Diab

Maha Shaikh

Maha Mostafa

 

Other publications of authors with the same name

SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems., , , , , , , , , and 4 other author(s). IEEE Trans. Computers, 68 (5): 765-783 (2019)Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution., , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (2): 40:1-40:26 (2022)Software platform dedicated for in-memory computing circuit evaluation., , , , and . RSP, page 43-49. ACM, (2017)Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing., , , , , , , and . DATE, page 1187-1192. IEEE, (2020)Software testing and software fault injection., , , and . DTIS, page 1-6. IEEE, (2015)Dedicated Instruction Set for Pattern-Based Data Transfers: An Experimental Validation on Systems Containing In-Memory Computing Units., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (11): 3757-3767 (November 2023)Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture., , , , , , and . VLSI-SoC, page 166-171. IEEE, (2019)Toward Modeling Cache-Miss Ratio for Dense-Data-Access-Based Optimization., , and . RSP, page 64-70. ACM, (2019)Cache-aware reliability evaluation through LLVM-based analysis and fault injection., , and . IOLTS, page 19-22. IEEE, (2016)Cross-layer system reliability assessment framework for hardware faults., , , , , , , , , and 4 other author(s). ITC, page 1-10. IEEE, (2016)