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Disambiguation of "Eyerman, Stijn"

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An Evaluation of High-Level Mechanistic Core Models.

, , , , and . ACM Trans. Archit. Code Optim., 11 (3): 28:1-28:25 (2014)

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Stijn Cleemput

 

Other publications of authors with the same name

Maximizing Heterogeneous Processor Performance Under Power Constraints., , , and . ACM Trans. Archit. Code Optim., 13 (3): 29:1-29:23 (2016)Per-thread cycle accounting in multicore processors., , and . ACM Trans. Archit. Code Optim., 9 (4): 29:1-29:22 (2013)An Evaluation of High-Level Mechanistic Core Models., , , , and . ACM Trans. Archit. Code Optim., 11 (3): 28:1-28:25 (2014)Improving IBM POWER8 Performance Through Symbiotic Job Scheduling., , , , and . IEEE Trans. Parallel Distributed Syst., 28 (10): 2838-2851 (2017)Restating the Case for Weighted-IPC Metrics to Evaluate Multiprogram Workload Performance., and . IEEE Comput. Archit. Lett., 13 (2): 93-96 (2014)Accurate and Scalable Many-Node Simulation., , , and . CoRR, (2024)DRAM Bandwidth and Latency Stacks: Visualizing DRAM Bottlenecks., , and . ISPASS, page 322-331. IEEE, (2022)Scale-Model Architectural Simulation., , , , and . ISPASS, page 58-68. IEEE, (2022)Mechanistic-empirical processor performance modeling for constructing CPI stacks on real hardware., , and . ISPASS, page 216-226. IEEE Computer Society, (2011)Optimizing Soft Error Reliability Through Scheduling on Heterogeneous Multicore Processors., , and . IEEE Trans. Computers, 67 (6): 830-846 (2018)