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Disambiguation of "Heirman, Wim"

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An Evaluation of High-Level Mechanistic Core Models.

, , , , and . ACM Trans. Archit. Code Optim., 11 (3): 28:1-28:25 (2014)

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Wim Wätjen

Wim Lutzke

Wim Broekaert

Wim Beyers

Wim Damen

 

Other publications of authors with the same name

RIO: ROB-Centric In-Order Modeling of Out-of-Order Processors., , , and . IEEE Comput. Archit. Lett., 20 (1): 78-81 (2021)Breaking In-Order Branch Miss Recovery., , , and . IEEE Comput. Archit. Lett., 19 (1): 30-33 (2020)Scale-Model Simulation., , , , and . IEEE Comput. Archit. Lett., 20 (2): 175-178 (2021)Many-core graph workload analysis., , , , and . SC, page 22:1-22:11. IEEE / ACM, (2018)The Intel Programmable and Integrated Unified Memory Architecture Graph Analytics Processor., , , , , , , , , and 10 other author(s). IEEE Micro, 43 (5): 78-87 (September 2023)RecoNoC: A reconfigurable network-on-chip., , , , and . ReCoSoC, page 1-2. IEEE, (2011)Simulating Wrong-Path Instructions in Decoupled Functional-First Simulation., , , and . ISPASS, page 124-133. IEEE, (2023)Fairness-aware scheduling on single-ISA heterogeneous multi-cores., , , , and . PACT, page 177-187. IEEE Computer Society, (2013)Low-Power Reconfigurable Network Architecture for On-Chip Photonic Interconnects., , , , , and . Hot Interconnects, page 163-169. IEEE Computer Society, (2009)Epoch Profiles: Microarchitecture-Based Application Analysis and Optimization., , , and . IEEE Comput. Archit. Lett., 14 (1): 30-33 (2015)