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Variable precision arithmetic circuits for FPGA-based multimedia processors., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 12 (9): 995-999 (2004)Settling Time Optimization for Three-Stage CMOS Amplifier Topologies., , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (12): 2569-2582 (2009)Corrections to "Settling Time Optimization for Three-Stage CMOS Amplifier Topologies" Dec 09 2569-2582., , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (7): 1812-1813 (2010)A novel background subtraction method based on color invariants and grayscale levels., , , , и . ICCST, стр. 1-5. IEEE, (2014)Leakage energy reduction techniques in deep submicron cache memories: a comparative study., , , и . ISCAS, IEEE, (2006)Design approach for high-bandwidth low-power three-stage operational amplifiers., , , и . I. J. Circuit Theory and Applications, 40 (3): 263-273 (2012)A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique., , и . PATMOS, том 4148 из Lecture Notes in Computer Science, стр. 311-318. Springer, (2006)Settling Time Minimization of Operational Amplifiers., , и . PATMOS, том 4644 из Lecture Notes in Computer Science, стр. 107-116. Springer, (2007)A high-speed energy-efficient 64-bit reconfigurable binary adder., , и . IEEE Trans. Very Large Scale Integr. Syst., 11 (5): 939-943 (2003)Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes., , , , и . Sensors, 22 (8): 2839 (2022)