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Disambiguation of "Ferrandi, Fabrizio"

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YAPPA: A compiler-based parallelization framework for irregular applications on MPSoCs.

, , , and . RSP, page 123-129. IEEE, (2013)

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Fabrizio Gabbiani

Fabrizio Catanese

Fabrizio Gabrielli

Fabrizio Arosio

Fabrizio Lindner

 

Other publications of authors with the same name

Bambu: A modular framework for the high level synthesis of memory-intensive applications., and . FPL, page 1-4. IEEE, (2013)Performance modeling of embedded applications with zero architectural knowledge., and . CODES+ISSS, page 277-286. ACM, (2010)HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms., , , , , , , , , and 1 other author(s). IEEE Micro, 30 (5): 88-97 (2010)Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis., , and . IEEE Des. Test, 35 (5): 54-62 (2018)Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks., , , , , and . DFT, page 223-230. IEEE Computer Society, (1993)An Expert Solution to Functional Testability Analysis of VLSI Circuits., , , , , and . SEKE, page 263-265. Knowledge Systems Institute, (1993)SYNAPTIC Project: Regularity Applied to Enhance Manufacturability and Yield at Several Abstraction Levels., , , , , , , , , and 3 other author(s). ARCS Workshops, VDE-Verlag, (2011)Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques., , , , and . DAC, page 467-470. ACM Press, (1996)Symbolic optimization of interacting controllers based onredundancy identification and removal., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (7): 760-772 (2000)A design methodology to implement memory accesses in high-level synthesis., , and . CODES+ISSS, page 49-58. ACM, (2011)