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Disambiguation of "Fujiwara, Hideo"

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Testing Superscalar Processors in Functional Mode.

, , , and . FPL, page 747-750. IEEE, (2005)

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Esther Fujiwara

Hideo Baba

Hideo Ohashi

Hideo Andreas Baba

Hideo Ikezawa-Hanada

 

Other publications of authors with the same name

Constraining Transition Propagation for Low-Power Scan Testing Using a Two-Stage Scan Architecture., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (5): 450-454 (2007)Non-scan design for testable data paths using thru operation., , , and . ASP-DAC, page 313-318. IEEE, (1997)Secure scan design using shift register equivalents against differential behavior attack., , and . ASP-DAC, page 818-823. IEEE, (2011)Fast false path identification based on functional unsensitizability using RTL information., , , and . ASP-DAC, page 660-665. IEEE, (2009)Broadside Transition Test Generation for Partial Scan Circuits through Stuck-at Test Generation., , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 301-316. Springer, (2006)Test research in Japan., , , , , and . IEEE Des. Test, 5 (5): 60-79 (1988)Multi-Frequency Modular Testing of SoCs by Dynamically Reconfiguring Multi-Port ATE., , and . ATS, page 107-110. IEEE, (2007)Area Overhead and Test Time Co-Optimization through NoC Bandwidth Sharing., , and . ATS, page 459-462. IEEE, (2007)Compressing Test Data for Deterministic BIST Using a Reconfigurable Scan Arhcitecture., , , , and . ATS, page 299-306. IEEE, (2006)Instruction-Based Delay Fault Self-Testing of Processor Cores., , , and . VLSI Design, page 933-. IEEE Computer Society, (2004)