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Disambiguation of "Li, Hsiang-Pang"

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A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.

, , , and . NVMSA, page 1-6. IEEE, (2015)

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Vincent Pang

Hsiang Kuang

Cuiping Pang

Jian Pang

Xiaoying Pang

 

Other publications of authors with the same name

A buffer cache architecture for smartphones with hybrid DRAM/PCM memory., , , and . NVMSA, page 1-6. IEEE, (2015)Sparse ReRAM engine: joint exploration of activation and weight sparsity in compressed neural networks., , , , , , and . ISCA, page 236-249. ACM, (2019)A Light-Weighted Software-Controlled Cache for PCM-based Main Memory Systems., , , and . ICCAD, page 22-29. IEEE, (2015)How to improve the space utilization of dedup-based PCM storage devices?, , , , and . CODES+ISSS, page 11-20. IEEE, (2015)Disturbance Relaxation for 3D Flash Memory., , , , and . IEEE Trans. Computers, 65 (5): 1467-1483 (2016)7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications., , , , , , , , , and 3 other author(s). ISSCC, page 134-135. IEEE, (2016)Achieving SLC performance with MLC flash memory., , , , and . DAC, page 192:1-192:6. ACM, (2015)A PCM translation layer for integrated memory and storage management., , , , and . CODES+ISSS, page 6:1-6:10. ACM, (2014)A partnership-based approach to minimize the maximal response time of flash-memory storage systems., , , , and . SAC, page 616-619. ACM, (2018)Fine-grained write scheduling for PCM performance improvement under write power budget., , , and . ISLPED, page 19-24. IEEE, (2015)