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Disambiguation of "Dwivedi, Devesh"

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Ultra-Fast Current Mode Sense Amplifier for Small \(I_CELL\) SRAM in FinFET with Improved Offset Tolerance.

, , , and . CSSP, 35 (9): 3066-3085 (2016)

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Mridula Dwivedi

Ravi Chandra Dwivedi

 

Other publications of authors with the same name

An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAM., , , , , and . CSSP, 38 (4): 1482-1505 (2019)A 20 nm robust single-ended boost-less 7T FinFET sub-threshold SRAM cell under process-voltage-temperature variations., , and . Microelectron. J., (2016)Design of Approximate Dividers for Error Tolerant Applications., , , and . MWSCAS, page 496-499. IEEE, (2018)Ultra-Fast Current Mode Sense Amplifier for Small \(I_CELL\) SRAM in FinFET with Improved Offset Tolerance., , , and . CSSP, 35 (9): 3066-3085 (2016)A robust 8T FinFET SRAM cell with improved stability for low voltage applications., , , and . VDAT, page 1-6. IEEE, (2016)Design of Approximate Booth Squarer for Error-Tolerant Computing., , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (5): 1230-1241 (2020)Nanoscale Memory Design for Efficient Computation: Trends, Challenges and Opportunity., , , , and . iNIS, page 29-34. IEEE, (2015)Single-ended sub-threshold finfet 7T SRAM cell without boosted supply., , and . ICICDT, page 1-4. IEEE, (2014)Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small Icell SRAM Using FinFET., , , , and . ACM Great Lakes Symposium on VLSI, page 95-98. ACM, (2015)Single-Ended Boost-Less (SE-BL) 7T Process Tolerant SRAM Design in Sub-threshold Regime for Ultra-Low-Power Applications., , and . CSSP, 35 (2): 385-407 (2016)