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Disambiguation of "Richmond, Dustin"

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RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators.

, , , and . ACM Trans. Reconfigurable Technol. Syst., 8 (4): 22:1-22:23 (2015)

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Dustin Stansbury

Richmond Lennox

Tania Richmond

Richmond Repgen

Gudrun Richmond

 

Other publications of authors with the same name

Classifying Computations on Multi-Tenant FPGAs., , , , and . DAC, page 1261-1266. IEEE, (2021)Tinker: Generating Custom Memory Architectures for Altera's OpenCL Compiler., , , , and . FCCM, page 21-24. IEEE Computer Society, (2016)Everyone's a Critic: A Tool for Exploring RISC-V Projects., , and . FPL, page 260-264. IEEE Computer Society, (2018)Classifying Computations on Multi-Tenant FPGAs., , , , and . FPGA, page 227. ACM, (2021)A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS., , , , , , , , , and 11 other author(s). VLSI Circuits, page 30-. IEEE, (2019)A Tensor Processing Framework for CPU-Manycore Heterogeneous Systems., , , , , , , , , and 4 other author(s). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (6): 1620-1635 (2022)Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters., , , , , , and . FPGA, page 111-122. ACM, (2023)A Tunable Dual-Edge Time-to-Digital Converter., , , , , , , , and . FCCM, page 253. IEEE, (2021)PynqCopter - An Open-source FPGA Overlay for UAVs., , , , and . IEEE BigData, page 2491-2498. IEEE, (2018)Beyond Static Parallel Loops: Supporting Dynamic Task Parallelism on Manycore Architectures with Software-Managed Scratchpad Memories., , , , , , and . ASPLOS (3), page 46-58. ACM, (2023)