( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
A survey on decoding schedules of LDPC convolutional codes and associated hardware architectures.

, , , , и . ISCC, стр. 898-905. IEEE Computer Society, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Mathieu Jégou

Cyrille Jégourel

Roland Jégou

Arnaud Jégou

Nicolas Jégou

 

Другие публикации лиц с тем же именем

Softcore Processor Optimization According to Real-Application Requirements., и . IEEE Embed. Syst. Lett., 5 (1): 4-7 (2013)Stochastic Decoding of Turbo Codes., , , и . IEEE Trans. Signal Process., 58 (12): 6421-6425 (2010)How to Feed a Growing Population - An IoT Approach to Crop Health and Growth., , , и . IEEE J. Emerg. Sel. Topics Circuits Syst., 11 (3): 435-448 (2021)Low complexity ADMM-LP based decoding strategy for LDPC convolutional codes., , , , и . SoftCOM, стр. 1-5. IEEE, (2017)Evaluation of the hardware complexity of the ADMM approach for LDPC decoding., , , , и . WCNC, стр. 1-6. IEEE, (2016)Comparison of different schedulings for the ADMM based LDPC decoding., , , , и . ISTC, стр. 51-55. IEEE, (2016)Fast Design of Reliable, Flexible and High-Speed AWGN architectures with High Level Synthesis., , , и . ICECS, стр. 661-664. IEEE, (2018)A highly parallel Turbo Product Code decoder without interleaving resource., , , , и . SiPS, стр. 1-6. IEEE, (2008)Memory Requirement Reduction Method for Successive Cancellation Decoding of Polar Codes., , , и . J. Signal Process. Syst., 88 (3): 425-438 (2017)High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping., , , и . J. Signal Process. Syst., 57 (3): 349-361 (2009)