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Disambiguation of "Kang, Kyung-Tae"

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7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers.

, , , , , , , , , , , , , , , , , , , , , , , , , , , , , and . ISSCC, page 130-131. IEEE, (2016)

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Tae Kyung Hyun

Kyung-Tae Cho

Tae Kyung Cho

Tae Wan Kang

Kyung-Tae Han

 

Other publications of authors with the same name

Masked Kinematic Continuity-aware Hierarchical Attention Network for pose estimation in videos., , , , , and . Neural Networks, (January 2024)HTNet: Anchor-free Temporal Action Localization with Hierarchical Transformers., , and . SMC, page 365-370. IEEE, (2022)7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers., , , , , , , , , and 20 other author(s). ISSCC, page 130-131. IEEE, (2016)A 128 Gb 3b/cell V-NAND Flash Memory With 1 Gb/s I/O Rate., , , , , , , , , and 19 other author(s). IEEE J. Solid State Circuits, 51 (1): 204-212 (2016)256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers., , , , , , , , , and 19 other author(s). IEEE J. Solid State Circuits, 52 (1): 210-217 (2017)MHCanonNet: Multi-Hypothesis Canonical lifting Network for self-supervised 3D human pose estimation in the wild video., , , , , , and . Pattern Recognit., (January 2024)A 0.33-1 GHz Open-Loop Duty Cycle Corrector With Digital Falling Edge Modulator., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (12): 1949-1953 (2018)7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate., , , , , , , , , and 24 other author(s). ISSCC, page 1-3. IEEE, (2015)Action-aware Masking Network with Group-based Attention for Temporal Action Localization., , , and . WACV, page 6047-6056. IEEE, (2023)Kinematic-aware Hierarchical Attention Network for Human Pose Estimation in Videos., , , , and . WACV, page 5714-5723. IEEE, (2023)