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Low-power technology mapping for FPGA architectures with dual supply voltages.

D. Chen, J. Cong, F. Li, and L. He. FPGA, page 109-117. ACM, (2004)

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Liu Deming

Deming Sun

Deming Kong

Chen Chen

Other publications of authors with the same name

Performance-driven mapping for CPLD architectures.D. Chen, J. Cong, M. Ercegovac, and Z. Huang. FPGA, page 39-47. ACM, (2001)ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation.H. Ye, C. Hao, J. Cheng, H. Jeong, J. Huang, S. Neuendorffer, and D. Chen. HPCA, page 741-755. IEEE, (2022)ScaleHLS: Scalable High-Level Synthesis through MLIR.H. Ye, C. Hao, J. Cheng, H. Jeong, J. Huang, S. Neuendorffer, and D. Chen. CoRR, (2021)SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems.X. Zhang, H. Lu, C. Hao, J. Li, B. Cheng, Y. Li, K. Rupnow, J. Xiong, T. Huang, H. Shi and 2 other author(s). CoRR, (2019)ASAP: Accelerated Short-Read Alignment on Programmable Hardware.S. Banerjee, M. El-Hadedy, J. Lim, Z. Kalbarczyk, D. Chen, S. Lumetta, and R. Iyer. CoRR, (2018)VecQ: Minimal Loss DNN Model Compression With Vectorized Weight Quantization.C. Gong, Y. Chen, Y. Lu, T. Li, C. Hao, and D. Chen. IEEE Trans. Computers, 70 (5): 696-710 (2021)ASAP: Accelerated Short-Read Alignment on Programmable Hardware.S. Banerjee, M. El-Hadedy, J. Lim, Z. Kalbarczyk, D. Chen, S. Lumetta, and R. Iyer. IEEE Trans. Computers, 68 (3): 331-346 (2019)FSSD: FPGA-Based Emulator for SSDs.L. Yu, Y. Lu, M. Mandava, E. Richter, V. Mailthody, S. Min, W. Hwu, and D. Chen. FPL, page 101-108. IEEE, (2023)Algorithm/Accelerator Co-Design and Co-Search for Edge AI.X. Zhang, Y. Li, J. Pan, and D. Chen. IEEE Trans. Circuits Syst. II Express Briefs, 69 (7): 3064-3070 (2022)PyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow.S. Huang, K. Wu, H. Jeong, C. Wang, D. Chen, and W. Hwu. FPGA, page 227-228. ACM, (2021)

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Disambiguation of "Chen, Deming"

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Low-power technology mapping for FPGA architectures with dual supply voltages.

Please choose a person to relate this publication to

Liu Deming

Deming Sun

Deming Kong

Deming Kong

Chen Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chen, Deming"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Low-power technology mapping for FPGA architectures with dual supply voltages.

Please choose a person to relate this publication to

Liu Deming

Deming Sun

Deming Kong

Deming Kong

Chen Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Low-power technology mapping for FPGA architectures with dual supply voltages.