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Disambiguation of "Aoyagi, Masahiro"

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Cool System scalable 3-D stacked heterogeneous Multi-Core / Multi-Chip architecture for ultra low-power digital TV applications.

, , , , , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2012)

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Masahiro Noguchi

Sakae Aoyagi

Masahiro Ogawa

Masahiro Yoshida

Masahiro Katsura

 

Other publications of authors with the same name

COOL interconnect low power interconnection technology for scalable 3D LSI design., , , , , , , , , and 2 other author(s). COOL Chips, page 1-3. IEEE Computer Society, (2011)Investigation of optimized high-density flip-chip interconnect design including micro Au bumps for 3-D stacked LSI packaging., , , , , , and . 3DIC, page 1-4. IEEE, (2013)3 Dimensional stacked pixel detector and sensor technology using less than 3-μmφ robust bump junctions., , , , , , and . 3DIC, page 1-4. IEEE, (2016)Guard-ring monitoring system for inspecting defects in TSV-based data buses., , and . 3DIC, page TS8.18.1-TS8.18.5. IEEE, (2015)Ultralow impedance evaluation system of wideband frequency for power distribution network of decoupling capacitor embedded substrates., , , , , , , , , and 1 other author(s). 3DIC, page 1-4. IEEE, (2009)Hot spots suppression by high thermal conductivity film in thin-sub strate CMOS ICs for 3D integration., , , and . 3DIC, page 1-4. IEEE, (2011)Copper filled TSV formation with Parylene-HT insulator for low-temperature compatible 3D integration., , , , , and . 3DIC, page 1-4. IEEE, (2014)Damage evaluation of wet-chemical silicon-wafer thinning process., , , and . 3DIC, page 1-4. IEEE, (2011)Small-diameter TSV reveal process using direct Si/Cu grinding and metal contamination removal., , , , , and . 3DIC, page 1-5. IEEE, (2014)Wet cleaning process for high-yield via-last TSV formation., , , , , , and . 3DIC, page 1-4. IEEE, (2016)