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Low Power Test for Nanometer System-on-Chips (SoCs)., , и . J. Low Power Electron., 4 (1): 81-100 (2008)Session Abstract.. VTS, стр. 86-87. IEEE Computer Society, (2006)Evaluation of Entropy Driven Compression Bounds on Industrial Designs., , , , и . ATS, стр. 13-18. IEEE Computer Society, (2008)DFT for Test Optimisations in a Complex Mixed-Signal SOC - Case Study on TI's TNETD7300 ADSL Modem Device., и . ITC, стр. 773-782. IEEE Computer Society, (2004)A framework to evaluate test tradeoffs in embedded core based systems-case study on TI's TMS320C27xx., , , , и . ITC, стр. 417-425. IEEE Computer Society, (2000)State Assignment for Optimal Design of Monitored Self-Checking Sequential Circuits., , и . VLSI Design, стр. 15-20. IEEE Computer Society, (1993)Reduced overhead soft error mitigation using error control coding techniques., , и . IOLTS, стр. 163-168. IEEE Computer Society, (2011)Methodology for low power test pattern generation using activity threshold control logic., , и . ICCAD, стр. 526-529. IEEE Computer Society, (2007)Monitoring machine based synthesis technique for concurrent error detection in finite state machines., , и . J. Electron. Test., 8 (2): 179-201 (1996)New Methods for Simulation Speed-up and Test Qualification with Analog Fault Simulation., , и . VLSID, стр. 363-368. IEEE Computer Society, (2015)