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Disambiguation of "Bull, David M."

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A robust FIR filter with in situ error detection.

, , , , and . ISCAS, page 4185-4188. IEEE, (2010)

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David M Eche

David M Eche

David M Stec

David M Allen

Udalrich Büll

 

Other publications of authors with the same name

RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance., , , , , , , and . IEEE J. Solid State Circuits, 44 (1): 32-48 (2009)Selective time borrowing for DSP pipelines with hybrid voltage control loop., , , and . ASP-DAC, page 763-768. IEEE, (2012)Razor II: In Situ Error Detection and Correction for PVT and SER Tolerance., , , , , , , and . ISSCC, page 400-401. IEEE, (2008)Addressing design margins through error-tolerant circuits., , , , and . DAC, page 11-12. ACM, (2009)14.6 An all-digital power-delivery monitor for analysis of a 28nm dual-core ARM Cortex-A57 cluster., , , and . ISSCC, page 1-3. IEEE, (2015)A 1 GHz Hardware Loop-Accelerator With Razor-Based Dynamic Adaptation for Energy-Efficient Operation., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (8): 2290-2298 (2014)A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation., , , and . CICC, page 1-4. IEEE, (2013)A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation., , , , , and . ISSCC, page 284-285. IEEE, (2010)Error-resilient low-power DSP via path-delay shaping., , , and . DAC, page 1008-1013. ACM, (2011)Correction to Ä Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation"., , , , , and . IEEE J. Solid State Circuits, 46 (3): 705 (2011)