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Disambiguation of "Krishnamurthy, Ram"

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μRNG: A 300-950mV 323Gbps/W all-digital full-entropy true random number generator in 14nm FinFET CMOS.

, , , , , , , , , , and . ESSCIRC, page 116-119. IEEE, (2015)

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Mahalakshmi Krishnamurthy

Adarsh Krishnamurthy

Arvind Krishnamurthy

Ram Gopal

Johann Ram

 

Other publications of authors with the same name

Dynamic addressing memory arrays with physical locality., , , , and . MICRO, page 161-170. ACM/IEEE Computer Society, (2002)Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI., , , , , , , , , and 6 other author(s). FPGA, page 119. ACM, (2019)A 230mV-950mV 2.8Tbps/W Unified SHA256/SM3 Secure Hashing Hardware Accelerator in 14nm Tri-Gate CMOS., , , , , , , and . ESSCIRC, page 98-101. IEEE, (2018)μRNG: A 300-950mV 323Gbps/W all-digital full-entropy true random number generator in 14nm FinFET CMOS., , , , , , , , , and 1 other author(s). ESSCIRC, page 116-119. IEEE, (2015)A 1.4GHz 20.5Gbps GZIP decompression accelerator in 14nm CMOS featuring dual-path out-of-order speculative Huffman decoder and multi-write enabled register file array., , , , , , , , , and 2 other author(s). VLSI Circuits, page 238-. IEEE, (2019)Tutorial: Design of Power Efficient VLSI Arithmetic: Speed and Power Trade-Offs., and . IEEE Symposium on Computer Arithmetic, page 280. IEEE Computer Society, (2003)Optimized Fused Floating-Point Many-Term Dot-Product Hardware for Machine Learning Accelerators., , , , and . ARITH, page 84-87. IEEE, (2019)A robust alternate repeater technique for high performance busses in the multi-core era., , , , and . ISCAS, page 372-375. IEEE, (2008)A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS., , , and . VLSI Design, page 301-306. IEEE Computer Society, (2009)A robust edge encoding technique for energy-efficient multi-cycle interconnect., , , , and . ISLPED, page 68-73. ACM, (2007)