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Disambiguation of "Tanabe, Jun"

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Architecture and Evaluation of Low Power Many-Core SoC with Two 32-Core Clusters.

, , , , , , , , , and . IEICE Trans. Electron., 97-C (4): 360-368 (2014)

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Jun Jun Lu

Jun Yang

Jun Yang

Jun Li

Manfred Jun

 

Other publications of authors with the same name

A 9.7mW AAC-Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward-Body-Biasing and Power-Gating Circuit in 65nm CMOS Technology., , , , , , , , , and 12 other author(s). ISSCC, page 262-263. IEEE, (2008)Development of Image Recognition Processor Based on Configurable Processor., , , , , , , , and . J. Robotics Mechatronics, 17 (4): 437-446 (2005)A low power many-core SoC with two 32-core clusters connected by tree based NoC for multimedia applications., , , , , , , , , and . VLSIC, page 150-151. IEEE, (2012)Architecture and Evaluation of Low Power Many-Core SoC with Two 32-Core Clusters., , , , , , , , , and . IEICE Trans. Electron., 97-C (4): 360-368 (2014)Minecraft Video Aesthetics Quality Assessment Model., , , and . IAIT, page 35:1-35:5. ACM, (2023)18.2 A 1.9TOPS and 564GOPS/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applications., , , , , , , , , and 2 other author(s). ISSCC, page 1-3. IEEE, (2015)A 20.5 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Automotive Applications., , , , , , , , , and 9 other author(s). IEEE J. Solid State Circuits, 55 (1): 120-132 (2020)A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications., , , , , , , , , and 7 other author(s). ISSCC, page 132-134. IEEE, (2019)Development of low power many-core SoC for multimedia applications., , , , , and . DATE, page 773-777. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Empirical Analysis of Travel Time Reliability Measures in Hanshin Expressway Network., , , , , and . J. Intell. Transp. Syst., 13 (1): 28-38 (2009)