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Session 8 overview: Low-power digital circuits., и . ISSCC, стр. 144-145. IEEE, (2016)3.1 POWER9™: A processor family optimized for cognitive computing with 25Gb/s accelerator links and 16Gb/s PCIe Gen4., , , , , , , , , и 4 other автор(ы). ISSCC, стр. 50-51. IEEE, (2017)Physical design and implementation of POWER8™ (P8) server class processor., , , и . MWSCAS, стр. 1-4. IEEE, (2015)F3: Adaptive design techniques for energy efficiency., , , , , и . ISSCC, стр. 514-515. IEEE, (2014)Design of the Power6 Microprocessor., , , , , , , , , и 7 other автор(ы). ISSCC, стр. 96-97. IEEE, (2007)Session 3 overview: Processors., и . ISSCC, стр. 44-45. IEEE, (2013)The 24-Core POWER9 Processor With Adaptive Clocking, 25-Gb/s Accelerator Links, and 16-Gb/s PCIe Gen4., , , , , , , , , и 13 other автор(ы). IEEE J. Solid State Circuits, 53 (1): 91-101 (2018)POWER10™: A 16-Core SMT8 Server Processor With 2TB/s Off-Chip Bandwidth in 7nm Technology., , , , , , , , , и 2 other автор(ы). ISSCC, стр. 48-50. IEEE, (2022)POWER8 design methodology innovations for improving productivity and reducing power., , , , , , , , , и 1 other автор(ы). CICC, стр. 1-9. IEEE, (2014)Design and Implementation of the POWER6 Microprocessor., , , , , , и . IEEE J. Solid State Circuits, 43 (1): 21-28 (2008)