( en | de | ru )

 

Disambiguation of "Molyneaux, Robert F."

Author of the publication

copydeleteadd this publication to your clipboard
DFT advances in Motorola's Next-Generation 74xx PowerPCTM microprocessor.

, , , , , , and . ITC, page 131-140. IEEE Computer Society, (2000)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Robert F Ofenloch

Robert F Lepenies

F Georgi

F Schiemann

F Gütlbauer

 

Other publications of authors with the same name

Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip., , , , , and . ITC, page 1-8. IEEE Computer Society, (2007)Debug and Diagnosis in the Age of System-on-a-Chip.. ITC, page 1303. IEEE Computer Society, (2003)Random Self-Test Method - Applications on PowerPC (tm) Microprocessor Caches., and . Great Lakes Symposium on VLSI, page 222-229. IEEE Computer Society, (1998)Efficient Testing of Clock Regenerator Circuits in Scan Designs., , , , and . DAC, page 95-100. ACM Press, (1997)DFT advances in Motorola's Next-Generation 74xx PowerPCTM microprocessor., , , , , , and . ITC, page 131-140. IEEE Computer Society, (2000)Comments on "Ternary Scan Design for VLSI Testability"., and . IEEE Trans. Computers, 38 (2): 256-263 (1989)How Seriously Do You Take Your Possible-Detect Faults?, , and . ITC, page 819-828. IEEE Computer Society, (1997)DFT advances in the Motorola's MPC7400, a PowerPC G4 microprocessor., , , , , , , and . ITC, page 137-146. IEEE Computer Society, (1999)At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm) Microprocessor., , , and . VTS, page 3-8. IEEE Computer Society, (2000)