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BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (2): 302-306 (2009)A Comparative Study of the Effectiveness of CPU Consolidation Versus Dynamic Voltage and Frequency Scaling in a Virtualized Multicore Server., and . IEEE Trans. Very Large Scale Integr. Syst., 24 (6): 2103-2116 (2016)Single-Bit Pseudoparallel Processing Low-Oversampling Delta-Sigma Modulator Suitable for SDR Wireless Transmitters., , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (4): 922-931 (2014)Theoretical bounds for switching activity analysis in finite-state machines., , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (3): 335-339 (2000)A new merit function for custom instruction selection under an area budget constraint., , , , and . Des. Autom. Embed. Syst., 17 (1): 1-25 (2013)Developing TEI-Aware Ultralow-Power SoC Platforms for IoT End Nodes., , , , , , , and . IEEE Internet Things J., 8 (6): 4642-4656 (2021)Computer-Aided Design and Optimization of Hybrid Energy Storage Systems., , , and . Found. Trends Electron. Des. Autom., 7 (4): 247-338 (2013)An accurate analytical I-V model for sub-90-nm MOSFETs and its application to read static noise margin modeling., , , and . J. Zhejiang Univ. Sci. C, 13 (1): 58-70 (2012)Timing-driven placement based on partitioning with dynamic cut-net control., and . DAC, page 472-476. ACM, (2000)Multi-objective optimization techniques for VLSI circuits., , and . ISQED, page 156-163. IEEE, (2011)