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Using dynamic shift to reduce test data volume in high-compression designs., , и . ETS, стр. 1-6. IEEE, (2014)Low-Power Scan Operation in Test Compression Environment., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (11): 1742-1755 (2009)Detecting and diagnosing open defects., , , , , и . ITC, стр. 811. IEEE Computer Society, (2010)Using Boolean Tests to Improve Detection of Transistor Stuck-Open Faults in CMOS Digital Logic Circuits., , и . VLSID, стр. 399-404. IEEE Computer Society, (2015)On Improving Transition Test Set Quality to Detect CMOS Transistor Stuck-Open Faults., , и . ATS, стр. 97-102. IEEE Computer Society, (2015)Novel Techniques for Achieving High At-Speed Transition Fault Test Coverage for Motorola's Microprocessors Based on PowerPC(tm) Instruction Set Architecture., , , , , и . VTS, стр. 3-8. IEEE Computer Society, (2002)The Impacts of Untestable Defects on Transition Fault Testing., и . VTS, стр. 2-7. IEEE Computer Society, (2006)Single Test Type to Replace Broadside and Skewed-Load Tests for Transition Faults., и . IEEE Trans. Very Large Scale Integr. Syst., 29 (2): 423-433 (2021)Thermal-Aware Small-Delay Defect Testing in Integrated Circuits for Mitigating Overkill., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (3): 499-512 (2016)On Reducing Scan Shift Activity at RTL., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (7): 1110-1120 (2010)