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A high performance hardware architecture for non-negative tensor factorization.

, , , and . Microelectron. J., (2019)

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Automating custom-precision function evaluation for embedded processors., , , , and . CASES, page 22-31. ACM, (2005)An FPGA-Based High-Performance Neural Ensemble Spiking Activity Simulator Utilizing Generalized Volterra Kernel and Complexity Analysis., , , , and . Journal of Circuits, Systems, and Computers, 25 (1): 1640004:1-1640004:21 (2016)Hydrate: Hybrid Reconfigurable Architecture Expressions., , , and . FPT, page 1-4. IEEE, (2011)Customizable elliptic curve cryptosystems., , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (9): 1048-1059 (2005)Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method., , , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (8): 952-962 (2007)Parallel architecture for DNA sequence inexact matching with Burrows-Wheeler Transform., , , , , , and . Microelectron. J., 44 (8): 670-682 (2013)Reconfigurable Number Theoretic Transform architectures for cryptographic applications., , , and . FPT, page 308-311. IEEE, (2010)A σδ modulator using gain-Boost Class-C Inverter for Audio Applications., , , , , and . Journal of Circuits, Systems, and Computers, (2013)A reconfigurable architecture for real-time prediction of neural activity., , , , and . ISCAS, page 1869-1872. IEEE, (2013)Customising Hardware Designs for Elliptic Curve Cryptography., , and . SAMOS, volume 3133 of Lecture Notes in Computer Science, page 274-283. Springer, (2004)