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Computing with Temporal Operators. University of California, Santa Barbara, USA, (2022)A pythonic approach for rapid hardware prototyping and instrumentation., , , , , and . FPL, page 1-7. IEEE, (2017)Superconducting Computing with Alternating Logic Elements., , , , and . ISCA, page 651-664. IEEE, (2021)Language Support for Navigating Architecture Design in Closed Form., , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 16 (1): 9:1-9:28 (2020)TiAcc: Triangle-inequality based Hardware Accelerator for K-means on FPGAs., , , , , , and . CCGRID, page 133-142. IEEE, (2021)Charm: A Language for Closed-Form High-Level Architecture Modeling., , , , , , , , and . ISCA, page 152-165. IEEE Computer Society, (2018)A Computational Temporal Logic for Superconducting Accelerators., , , , , , , and . ASPLOS, page 435-448. ACM, (2020)ASPLOS 2020 was canceled because of COVID-19..Flexible FEC codes for next-generation software-defined optical transceivers., , , , and . ICTON, page 1-4. IEEE, (2014)Quantum Circuit Simulation with Fast Tensor Decision Diagram., , , , , and . CoRR, (2024)Application debug in FPGAs in the presence of multiple asynchronous clocks., , , , and . FPT, page 189-192. IEEE, (2016)