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Disambiguation of "Vasudevan, Dilip"

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Temporal Computing With Superconductors.

, , , , , , , and . IEEE Micro, 41 (3): 71-79 (2021)

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Ramaswami Vasudevan

N Vasudevan

Dilip Maitra

Desikachari Vasudevan

Anju Vasudevan

 

Other publications of authors with the same name

Benefits of Optimistic Parallel Discrete Event Simulation for Network-on-Chip Simulation., , , , and . DS-RT, page 30-39. IEEE, (2023)SRNoC: A Statically-Scheduled Circuit-Switched Superconducting Race Logic NoC., , , , , and . IPDPS, page 1046-1055. IEEE, (2021)Boosted Race Trees for Low Energy Classification., , , , and . ASPLOS, page 215-228. ACM, (2019)In-sensor classification with boosted race trees., , , , and . Commun. ACM, 64 (6): 99-105 (2021)Temporal Computing With Superconductors., , , , , , , and . IEEE Micro, 41 (3): 71-79 (2021)A Computational Temporal Logic for Superconducting Accelerators., , , , , , , and . ASPLOS, page 435-448. ACM, (2020)ASPLOS 2020 was canceled because of COVID-19..Synthesis of Nanoelectronic Circuits on Delay-Insensitive Cellular Arrays., and . DELTA, page 149-156. IEEE Computer Society, (2006)On the Effect of Stuck-at Faults on Delay-insensitive Nanoscale Circuits., , and . DFT, page 371-379. IEEE Computer Society, (2005)A Technique for Modular Design of Self-Checking Carry-Select Adder., and . DFT, page 325-333. IEEE Computer Society, (2005)PARADISE - Post-Moore Architecture and Accelerator Design Space Exploration Using Device Level Simulation and Experiments., , , and . ISPASS, page 139-140. IEEE, (2019)