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Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints.

, , , , , and . CISIS, page 681-687. IEEE Computer Society, (2009)

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SoC Communication Architectures: From Interconnection Buses to Packet-Switched NoCs., , , and . Embedded Systems Design and Verification, CRC Press, (2009)Networks-on-Chip: an Interconnect Fabric for Multiprocessor Systems-on-Chip., , , and . Embedded Systems Design and Verification, CRC Press, (2009)Transparent lifetime built-in self-testing of networks-on-chip through the selective non-concurrent testing of their communication channels., and . AISTECS@HiPEAC, page 12-17. ACM, (2017)Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip., , , and . ACM Great Lakes Symposium on VLSI, page 125-128. ACM, (2009)Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology., , , , , , , , , and . Trans. High Perform. Embed. Archit. Compil., (2007)Energy-Reliability trade-Off for NoCs., , and . Networks on Chip, Kluwer / Springer, (2003)Interdisciplinary design of a research experience on microelectronic systems for K-12 students., and . EWME, page 64-69. IEEE, (2014)PROTON+: A Placement and Routing Tool for 3D Optical Networks-on-Chip with a Single Optical Layer., , , and . JETC, 12 (4): 44:1-44:28 (2016)Contrasting wavelength-routed optical NoC topologies for power-efficient 3D-stacked multicore processors using physical-layer analysis., , , and . DATE, page 1589-1594. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Power aware network interface management for streaming multimedia., , and . WCNC, page 926-930. IEEE, (2002)