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Disambiguation of "Medardoni, Simone"

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Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints.

, , , , , and . CISIS, page 681-687. IEEE Computer Society, (2009)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Simone Altmann

Funktionelle Analyse von 13-Lipoxygenaseabgeleiteten Oxylipinen in der Pathogenabwehr von Solanum tuberosum L.. NA Halle-Wittenberg, (2009)

Simone Aymanns

Charakterisierung des rgf-Regulators aus Streptococcus agalactiae. Uni Ulm, (2009)

Simone Tuchen

Untersuchungen zur Konzentrationsbestimmung in der vorderen Augenkammer nach topischer Applikation von Voriconazol und Caspofungin auf die Hornhaut von Kaninchen. Uni Magdeburg, (2009)

Simone Niederhöfer

Stressbelastung bei Pferden in Abhängigkeit des Haltungssystems. TierH Hannover, (2009)

Simone Ulke

Synthese und Charakterisierung poröser sprüh- und ofengetrockneter Silika- und Hybridgele. Uni Münster, (2009)
 

Other publications of authors with the same name

Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (4): 534-547 (2011)Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing., , , , , , , and . NOCS, page 25-32. IEEE Computer Society, (2010)Improved Utilization of NoC Channel Bandwidth by Switch Replication for Cost-Effective Multi-processor Systems-on-Chip., , , and . NOCS, page 165-172. IEEE Computer Society, (2010)Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints., , , , , and . CISIS, page 681-687. IEEE Computer Society, (2009)Flexible DOR routing for virtualization of multicore chips., , , , , and . SoC, page 73-76. IEEE, (2009)Efficient implementation of distributed routing algorithms for NoCs., , , , and . IET Comput. Digit. Tech., 3 (5): 460-475 (2009)Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework., , , , , , and . NOCS, page 107-116. IEEE Computer Society, (2008)Yield-oriented evaluation methodology of network-on-chip routing implementations., , , , , , , , and . SoC, page 100-105. IEEE, (2009)Control and datapath decoupling in the design of a NoC switch: area, power and performance implications., , , and . SoC, page 1-4. IEEE, (2007)Power-optimal RTL arithmetic unit soft-macro selection strategy for leakage-sensitive technologies., , and . ISLPED, page 159-164. ACM, (2007)