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Coupling control in the few-electron regime of quantum dot arrays using 2-metal gate levels in CMOS technology., , , , , , , , , and 6 other author(s). ESSCIRC, page 45-48. IEEE, (2022)Si MOS technology for spin-based quantum computing., , , , , , , , , and 7 other author(s). ESSDERC, page 12-17. IEEE, (2018)Transport characterization of CMOS-based devices fabricated with isotopically-enriched 28Si for spin qubit applications., , , , , , , , , and 1 other author(s). ESSDERC, page 5-8. IEEE, (2023)Specificities of linear Si QD arrays integration and characterization., , , , , , , , , and 11 other author(s). VLSI Technology and Circuits, page 415-416. IEEE, (2022)Towards scalable silicon quantum computing., , , , , , , , , and 7 other author(s). DRC, page 1-2. IEEE, (2018)MOS technology for quantum computing: recent progress and perspectives for scaling up., , , , , , , , , and 3 other author(s). DRC, page 1-2. IEEE, (2021)SOI CMOS technology for quantum information processing., , , , , , , , , and 5 other author(s). ICICDT, page 1-4. IEEE, (2017)