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pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking.

Y. Kim, H. Kwon, S. Doo, M. Ahn, Y. Kim, Y. Lee, D. Kang, S. Do, C. Lee, G. hee Cho, J. Park, J. Kim, K. Park, S. Oh, S. Lee, J. Yu, K. Yu, C. Jeon, S. Kim, H. Park, J. Lee, S. Cho, K. Park, Y. Kim, Y. Seo, C. Shin, C. Lee, S. Bang, Y. Park, S. Choi, B. Kim, G. Han, S. Bae, H. Kwon, J. Choi, Y. Sohn, K. Park, S. Jang, and G. Jin. IEEE J. Solid State Circuits, 54 (1): 197-209 (2019)

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Dong-Seok Tschoe

Dong Seok Rhee

Bong-Seok Kang

Dong-Seok Kim

Dong-Hee Kang

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Automating Public Administration in the Digital Age.E. Chae, D. Kang, J. Si, S. Yun, P. Jung, S. Park, H. Lee, and K. Choi. ICACT, page 628-631. IEEE, (2020)A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking.Y. Kim, H. Kwon, S. Doo, M. Ahn, Y. Kim, Y. Lee, D. Kang, S. Do, C. Lee, G. hee Cho and 29 other author(s). IEEE J. Solid State Circuits, 54 (1): 197-209 (2019)A 4-GHz Sub-Harmonically Injection-Locked Phase-Locked Loop With Self-Calibrated Injection Timing and Pulsewidth.X. Jin, W. Park, D. Kang, Y. Ko, K. Kwon, and J. Chun. IEEE J. Solid State Circuits, 55 (10): 2724-2733 (2020)A 4.0-10.0-Gb/s Referenceless CDR with Wide-Range, Jitter-Tolerant, and Harmonic-Lock-Free Frequency Acquisition Technique.J. Jin, J. Kim, H. Kim, C. Piao, J. Choi, D. Kang, and C. Jung-Hoon. ESSCIRC, page 146-149. IEEE, (2018)A 4-GHz Sub-harmonically Injection-Locked Phase-Locked Loop with Self-Calibrated Injection Timing and Pulsewidth.X. Jin, D. Kang, Y. Ko, K. Kwon, and J. Chun. A-SSCC, page 83-86. IEEE, (2019)A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking.Y. Kim, H. Kwon, S. Doo, Y. Eom, Y. Kim, M. Ahn, Y. Kim, S. Jung, S. Do, C. Lee and 39 other author(s). ISSCC, page 204-206. IEEE, (2018)A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW.S. Bae, Y. Sohn, T. Oh, S. Kim, Y. Yang, D. Kim, S. Kwak, H. Seol, C. Shin, M. Park and 19 other author(s). ISSCC, page 498-500. IEEE, (2011)Case Study on the Effects of Administrative Informatization on the Organizational Structure for the Central Government in Korea.D. Kang, H. Kwon, and Y. Ko. EGOV, volume 5184 of Lecture Notes in Computer Science, page 49-60. Springer, (2008)

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A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking.

Please choose a person to relate this publication to

Dong-Seok Tschoe

Dong Seok Rhee

Bong-Seok Kang

Dong-Seok Kim

Dong-Hee Kang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Kang, Dong-Seok"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking.

Please choose a person to relate this publication to

Dong-Seok Tschoe

Dong Seok Rhee

Bong-Seok Kang

Dong-Seok Kim

Dong-Hee Kang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking.