Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

State-based power analysis for systems-on-chip., and . DAC, page 638-641. ACM, (2003)Redesign using state splitting., and . EURO-DAC, page 157-161. IEEE Computer Society, (1990)High-level synthesis in an industrial environment., , , , , , and . IBM J. Res. Dev., 39 (1-2): 131-148 (1995)The State of ESL Design Roundtable., , , , , and . IEEE Des. Test Comput., 25 (6): 510-519 (2008)Observable Time Windows: Verifying High-Level Synthesis Results., and . IEEE Des. Test Comput., 14 (2): 40-50 (1997)Heterogeneous behavioral hierarchy for system level designs., , and . DATE, page 565-570. European Design and Automation Association, Leuven, Belgium, (2006)Automatic synthesis and technology mapping of combinational logic.. ICCAD, page 466-469. IEEE Computer Society, (1988)Synthesis of Arrays and Records., , , , and . ICCD, page 614-619. IEEE Computer Society, (1999)Bridging the domains of high-level and logic synthesis.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (5): 582-596 (2002)Introductions to special issue on ESWEEK 2011., , , , , , and . Des. Autom. Embed. Syst., 17 (2): 215-219 (2013)