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A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA.

, , , , , , , и . Engineering of Reconfigurable Systems and Algorithms, стр. 181-187. CSREA Press, (2003)

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Zhou Zhou

Pei Kuang

Zhou Zhou

Kuan Tong

Kuan Yang

 

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Dynamic Block Size Adjustment and Workload Balancing Strategy Based on CPU-GPU Heterogeneous Platform., , , и . ISPA/BDCloud/SocialCom/SustainCom, стр. 999-1006. IEEE, (2019)Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques., , , , , , и . FPL, том 2438 из Lecture Notes in Computer Science, стр. 414-423. Springer, (2002)Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes., , , , , , , и . FPT, стр. 182-188. IEEE, (2002)The gigahertz FPGA: design consideration and applications., , , , , , , , , и . FPGA, стр. 248. ACM, (2004)On-chip dynamic programming networks using 3D-TSV integration., , , , , , и . ICSAMOS, стр. 318-325. IEEE, (2011)Impact of Deep-Trench-Isolation-Sharing Techniques on Ultrahigh-Speed Digital Systems., и . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (10): 778-782 (2009)A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology., , , , , и . FPGA, стр. 145-153. ACM, (2003)3D direct vertical interconnect microprocessors test vehicle., , , , , и . ACM Great Lakes Symposium on VLSI, стр. 141-146. ACM, (2003)Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory., , , , , , , , , и . FPL, том 2778 из Lecture Notes in Computer Science, стр. 11-20. Springer, (2003)The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA., , , , , , , , и . ACM Great Lakes Symposium on VLSI, стр. 141-144. ACM, (2004)