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Disambiguation of "Cheng, Chung-Kuan"

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Physical synthesis of bus matrix for high bandwidth low power on-chip communications.

, , , and . ISPD, page 91-96. ACM, (2010)

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Chung-hsin Cheng

Yuan-Chung Cheng

Wen Chung Cheng

Chung-tao Cheng

Cheng Han Chung

 

Other publications of authors with the same name

Stairway compaction using corner block list and its applications with rectilinear blocks., , , , , and . ACM Trans. Design Autom. Electr. Syst., 9 (2): 199-211 (2004)Placement and beyond in honor of Ernest S. Kuh.. ISPD, page 5-8. ACM, (2011)Worst-case performance prediction under supply voltage and temperature variation., , , and . SLIP, page 91-96. ACM, (2010)Predicting the worst-case voltage violation in a 3D power network., , , , , and . SLIP, page 93-98. ACM, (2009)Estimation of wirelength reduction for lambda-geometry vs. manhattan placement and routing., , , , and . SLIP, page 71-76. ACM, (2003)Empirical study on sufficient numbers of minimum cuts in strongly connected directed random graphs., , , , , , , and . Networks, 76 (1): 106-121 (2020)Symbolic layout compaction under conditional design rules., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 11 (4): 475-486 (1992)Optimization by iterative improvement: an experimental evaluation on two-way partitioning., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (2): 145-153 (1995)Efficient Thermal via Planning Approach and Its Application in 3-D Floorplanning., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (4): 645-658 (2007)Sequence-pair approach for rectilinear module placement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (4): 484-493 (1999)