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O test scheme and adaptive refresh considering temperature distribution.

K. Sohn, W. Yun, R. Oh, C. Oh, S. Seo, M. Park, D. Shin, W. Jung, S. Shin, J. Ryu, H. Yu, J. Jung, K. Nam, S. Choi, J. Lee, U. Kang, Y. Sohn, J. Choi, C. Kim, S. Jang, and G. Jin. ISSCC, page 316-317. IEEE, (2016)

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Seung-Min Ryu

Ryu Yoshiwhara

Hosuk Ryu

Stella Ryu

Ryu Saito

Other publications of authors with the same name

A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features.Y. Ryu, S. Ahn, J. Lee, J. Park, Y. Kim, H. Kim, Y. Song, H. Cho, S. Cho, S. Song and 29 other author(s). IEEE J. Solid State Circuits, 58 (4): 1051-1061 (2023)A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution.K. Sohn, W. Yun, R. Oh, C. Oh, S. Seo, M. Park, D. Shin, W. Jung, S. Shin, J. Ryu and 9 other author(s). IEEE J. Solid State Circuits, 52 (1): 250-260 (2017)18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.K. Sohn, W. Yun, R. Oh, C. Oh, S. Seo, M. Park, D. Shin, W. Jung, S. Shin, J. Ryu and 11 other author(s). ISSCC, page 316-317. IEEE, (2016)A 16 GB 1024 GB/s HBM3 DRAM with On-Die Error Control Scheme for Enhanced RAS Features.Y. Ryu, Y. Kwon, J. Lee, S. Ahn, J. Park, K. Lee, Y. Choi, H. Cho, J. Kim, J. Lee and 28 other author(s). VLSI Technology and Circuits, page 130-131. IEEE, (2022)25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications.Y. Kwon, S. Lee, J. Lee, S. Kwon, J. Ryu, J. Son, S. O, H. soo Yu, H. Lee, S. Kim and 20 other author(s). ISSCC, page 350-352. IEEE, (2021)

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Disambiguation of "Ryu, Je-Min"

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18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.

Please choose a person to relate this publication to

Seung-Min Ryu

Ryu Yoshiwhara

Hosuk Ryu

Stella Ryu

Ryu Saito

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Ryu, Je-Min"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.

Please choose a person to relate this publication to

Seung-Min Ryu

Ryu Yoshiwhara

Hosuk Ryu

Stella Ryu

Ryu Saito

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.