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Disambiguation of "Sha, Edwin Hsing-Mean"

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MGC: Multiple graph-coloring for non-volatile memory based hybrid Scratchpad Memory.

, , , , , and . Interaction between Compilers and Computer Architectures, page 17-24. IEEE Computer Society, (2012)

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William Meany

Wenjung Hsing

Joseph Edwin

Chi-Wu Hsing

Sha Wang

 

Other publications of authors with the same name

Communication Scheduling With Re-Routing Based On Static And Hybrid Techniques., , and . Journal of Circuits, Systems, and Computers, 13 (5): 1039-1064 (2004)Maximize Parallelism Minimize Overhead for Nested Loops via Loop Striping., , and . VLSI Signal Processing, 47 (2): 153-167 (2007)Algorithms and analysis of scheduling for low-power high-performance DSP on VLIW processors., , , and . IJHPCN, 1 (1/2/3): 4-16 (2004)Performance optimization of multiple memory architectures for DSP., , and . ISCAS (5), page 469-472. IEEE, (2002)An Integrated Framework of Design Optimization and Space Minimization for DSP applications., , and . ISCAS (5), page 601-604. IEEE, (2003)Partitioning and Retiming of Multi-Dimensional Systems., , and . ISCAS, page 227-230. IEEE, (1994)Algorithms for Optimally Arranging Multicore Memory Structures., , , , and . EURASIP J. Embed. Syst., (2010)Optimized Address Assignment With Array and Loop Transformations for Minimizing Schedule Length., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (1): 379-389 (2008)Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors., , , , and . ACM Trans. Embed. Comput. Syst., 13 (4): 79:1-79:25 (2014)Data Placement and Duplication for Embedded Multicore Systems With Scratch Pad Memory., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (6): 809-817 (2013)