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Disambiguation of "Asada, Kunihiro"

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Exact Minimum-Width Transistor Placement for Dual and Non-dual CMOS Cells.

, , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (12): 3485-3491 (2005)

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Kunihiro Jojima

 

Other publications of authors with the same name

One-Dimensional Analysis of Subthreshold Characteristics of SOI-MOSFET Considering Quantum Mechanical Effects., , and . VLSI Design, 6 (1-4): 65-67 (1998)A 65 nm Gate-Level Pipelined Self-Synchronous FPGA for High Performance and Variation Robust Operation., , and . IEEE J. Solid State Circuits, 46 (11): 2500-2513 (2011)Spatial resolution improvement for point light source detection in scintillator cube using SPAD array with multi pinholes., , , , and . IEICE Electron. Express, 16 (19): 20190390 (2019)4-Gb/s low-power PRBS Generator with wave-pipeline technique in 0.18-μm CMOS., , and . ICECS, page 1007-1010. IEEE, (2006)Experimental demonstration of stochastic comparators for fine resolution ADC without calibration., , , , and . ICECS, page 29-32. IEEE, (2016)3.5-Gb/s extended frequency range wave-pipeline PRBS Generator in 0.18-μm CMOS., , and . ICECS, page 526-529. IEEE, (2007)Datapath Delay Distributions for Data/Instruction against PVT Variations in 90nm CMOS., , , and . ICECS, page 154-157. IEEE, (2007)Pre-conditioning Free Footless DCVSL for High-performance Datapaths., , and . ICECS, page 1053-1056. IEEE, (2006)A Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion., , , and . VLSI-SoC, page 55-58. IEEE, (2018)A smart position sensor for 3-D measurement., , , and . ASP-DAC, page 21-22. ACM, (2001)