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Disambiguation of "Aunet, Snorre"

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Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers.

, , , , and . ISCAS (1), page 345-348. IEEE, (2003)

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Other publications of authors with the same name

Ultra-low voltage adders in 28 nm FDSOI exploring poly-biasing for device sizing., , , and . NORCAS, page 1-4. IEEE, (2016)Clocked semi-floating-gate ultra low-voltage current mirror., , and . ICECS, page 1038-1041. IEEE, (2008)Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology., , and . NORCAS, page 1-6. IEEE, (2019)A Configurable and Versatile Architecture for Low Power, Energy Efficient Hardware Acceleration of Convolutional Neural Networks., , and . NORCAS, page 1-6. IEEE, (2019)28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block., , and . MIXDES, page 105-110. IEEE, (2016)Ultra Low Power Full Adder Topologies., , , , , and . ISCAS, page 3158-3161. IEEE, (2009)Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers., , , , and . ISCAS (1), page 345-348. IEEE, (2003)Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion., , , and . ISCAS (4), page 838-841. IEEE, (2001)Extreme low-voltage floating-gate CMOS transconductance amplifier., , , , and . ISCAS (1), page 37-40. IEEE, (2001)Real-Time Reconfigurable Linear Threshold Elements and Some Applications to Neural Hardware., and . ICES, volume 2606 of Lecture Notes in Computer Science, page 365-376. Springer, (2003)