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A Fault Tolerant Parallelism Approach for Implementing High-Throughput Pipelined Advanced Encryption Standard., and . J. Circuits Syst. Comput., 25 (9): 1650113:1-1650113:14 (2016)Threats on Logic Locking: A Decade Later., , , and . ACM Great Lakes Symposium on VLSI, page 471-476. ACM, (2019)Metrics-to-Methods: Decisive Reverse Engineering Metrics for Resilient Logic Locking., , , and . ACM Great Lakes Symposium on VLSI, page 685-690. ACM, (2023)RANE: An Open-Source Formal De-obfuscation Attack for Reverse Engineering of Logic Encrypted Circuits., , , and . ACM Great Lakes Symposium on VLSI, page 221-228. ACM, (2021)Warm Up before Circuit De-obfuscation? An Exploration through Bounded-Model-Checkers., , , and . HOST, page 13-16. IEEE, (2022)Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration., , , , , , , , , and . IEEE Access, (2024)SiPGuard: Run-Time System-in-Package Security Monitoring via Power Noise Variation., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 32 (2): 305-318 (February 2024)Secure and Robust Key-Trapped Design-for-Security Architecture for Protecting Obfuscated Logic.. IACR Cryptol. ePrint Arch., (2022)Advances in Logic Locking: Past, Present, and Prospects., , , and . IACR Cryptol. ePrint Arch., (2022)ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs., , , , , and . DAC, page 1-6. IEEE, (2023)