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Exploiting Parallelism in Double Path Adders' Structure for Increased Throughput of Floating Point Addition.

, , , , and . DSD, page 132-137. IEEE Computer Society, (2007)

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Exploiting Parallelism in Double Path Adders' Structure for Increased Throughput of Floating Point Addition., , , , and . DSD, page 132-137. IEEE Computer Society, (2007)The Bubble Bit Technique as Improvement of HDL-Based Quantum Circuits Simulation., , and . Annual Simulation Symposium, page 217-224. IEEE Computer Society, (2005)Using Simulated Fault Injection for Fault Tolerance Assessment of Quantum Circuits., , , , and . Annual Simulation Symposium, page 213-220. IEEE Computer Society, (2007)Improving quantum circuit dependability with reconfigurable quantum gate arrays., , and . Conf. Computing Frontiers, page 133-144. ACM, (2005)Automatic Synthesis for Quantum Circuits Using Genetic Algorithms., , , and . ICANNGA (1), volume 4431 of Lecture Notes in Computer Science, page 174-183. Springer, (2007)Adaptive vs. Self-adaptive Parameters for Evolving Quantum Circuits., , , and . ICES, volume 6274 of Lecture Notes in Computer Science, page 348-359. Springer, (2010)Biology Meets Electronics: The Path to a Bio-inspired FPGA., , , and . ICES, volume 1801 of Lecture Notes in Computer Science, page 187-196. Springer, (2000)Genetic algorithm based quantum circuit synthesis with adaptive parameters control., , , and . IEEE Congress on Evolutionary Computation, page 896-903. IEEE, (2009)High capacity steganographic algorithm based on payload adaptation and optimization., , and . SACI, page 87-92. IEEE, (2012)Saboteur-Based Fault Injection for Quantum Circuits Fault Tolerance Assessment., , , , and . DSD, page 634-640. IEEE Computer Society, (2007)