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Reliability-Aware Overlay Architectures for FPGAs: Features and Design Challenges.. CoRR, (2016)A soft error vulnerability analysis framework for Xilinx FPGAs., , and . FPGA, page 237-240. ACM, (2014)A fault injection platform for the analysis of soft error effects in FPGA soft processors., and . DDECS, page 15-20. IEEE, (2016)Chip Self-Organization and Fault Tolerance in Massively Defective Multicore Arrays., , , and . IEEE Trans. Dependable Secur. Comput., 8 (2): 207-217 (2011)Software-Based Self-Testing of Symmetric Shared-Memory Multiprocessors., , , and . IEEE Trans. Computers, 58 (12): 1682-1694 (2009)Security and Reliability Evaluation of Countermeasures implemented using High-Level Synthesis., , , , and . IOLTS, page 1-8. IEEE, (2022)Detecting Hardware Faults in Approximate Adders via Minimum Redundancy., , and . IOLTS, page 1-7. IEEE, (2023)A Functional Self-Test Approach for Peripheral Cores in Processor-Based SoCs., , , and . IOLTS, page 271-276. IEEE Computer Society, (2007)Software-Based Self-Test for Pipelined Processors: A Case Study., , , , and . DFT, page 535-543. IEEE Computer Society, (2005)FPGA-based Acceleration for Tracking Audio Effects in Movies., , and . FCCM, page 85-92. IEEE Computer Society, (2012)