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A 2kV ESD-Protected 18GHz LNA with 4dB NF in 0.13μm CMOS., , and . ISSCC, page 194-195. IEEE, (2008)From Silicon Aether and Back., , and . ISSCC, page 152-153. IEEE, (2008)Physical scaling of integrated inductor layout and model and its application to WLAN VCO design at 11GHz and 17GHz.. ISCAS (1), page 637-640. IEEE, (2003)Design of Low-Noise K-Band SiGe Bipolar VCOs: Theory and Implementation., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (2): 607-615 (2015)Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (5): 920-932 (2009)MOS varactors with n- and p-type gates and their influence on an LC-VCO in digital CMOS., , and . IEEE J. Solid State Circuits, 38 (7): 1139-1147 (2003)LC-VCO in the 3.3- to 4-GHz Band Implemented in 32-nm Low-Power CMOS Technology., , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (8): 467-471 (2011)A 50 GHz direct injection locked oscillator topology as low power frequency divider in 0.13 μm CMOS.. ESSCIRC, page 73-76. IEEE, (2003)Merged power amplifier and mixer circuit topology for radar applications in CMOS., , , , and . ESSCIRC, page 300-303. IEEE, (2009)Reduction of VCO phase noise through forward substrate biasing of switched MOSFETs., , and . ESSCIRC, page 326-329. IEEE, (2008)