( en | de | ru )

 

Disambiguation of "Nakamura, Tadao"

Author of the publication

copydeleteadd this publication to your clipboard
Panel discussions: "Cool chips for the next decade".

, , , , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Shin'ichiro Nakamura

Makoto Nakamura

Akira Nakamura

Hatsuo Nakamura

Hideki Nakamura

 

Other publications of authors with the same name

Automated Design of Wave Pipelined Multiport Register Files., , , , and . ASP-DAC, page 197-202. IEEE, (1998)Toward Architecting and Designing Novel Computers.. Asia-Pacific Computer Systems Architecture Conference, volume 2823 of Lecture Notes in Computer Science, page 8-13. Springer, (2003)Exploiting Loop-Level Parallelism with the Shift Architecture., and . SBAC-PAD, page 184-194. IEEE Computer Society, (2002)Panel discussions: "Cool chips for the next decade"., , , , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2017)A low power NoC router using the marching memory through type., , , , , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2014)An Adaptive Network Routing Method by Electrical-Circuit Modeling., , and . INFOCOM, page 586-592. IEEE Computer Society, (1993)On-Chip Decentralized Routers with Balanced Pipelines for Avoiding Interconnect Bottleneck., , , , and . NOCS, page 16:1-16:8. ACM, (2015)Development of a peristaltic pump based on bowel peristalsis using for artificial rubber muscle., and . IROS, page 3085-3090. IEEE, (2010)Evaluating reconfigurable dataflow computing using the Himeno benchmark., , , and . ReConFig, page 1-7. IEEE, (2012)An Introduction to Marching Memory (MM).. 3DIC, page 1-3. IEEE, (2019)