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Disambiguation of "Dasgupta, Sudeb"

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Two-dimensional numerical modeling of lightly doped nano-scale double-gate MOSFET.

, , and . Microelectron. J., 37 (6): 537-545 (2006)

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Shivaji Dasgupta

Shyamal Dasgupta

Subho Dasgupta

Subhoranjan Dasgupta

Shyamal Dasgupta

 

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The impact of process-induced mechanical stress in narrow width devices and variable-taper CMOS buffer design., , and . Microelectron. Reliab., 53 (5): 718-724 (2013)Impact of dual-k spacer on analog performance of underlap FinFET., , and . Microelectron. J., 43 (11): 883-887 (2012)Oxide thickness and S/D junction depth based variation aware OTA design using underlap FinFET., , and . Microelectron. J., (2016)Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications., , and . VLSI Design, (2009)An Analytical Delay Model for Mechanical Stress Induced Systematic Variability Analysis in Nanoscale Circuit Design., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (6): 1714-1726 (2014)Negative capacitance gate stack and Landau FET-based voltage amplifiers and circuits: Impact of ferroelectric thickness and domain variations., , , and . Microelectron. J., (December 2023)A low-noise, process-variation-tolerant double-gate FinFET based sense amplifier., , and . Microelectron. Reliab., 51 (4): 773-780 (2011)Modeling of Leakage Current Mechanisms in Nanoscale DG MOSFET and its Application to Low Power SRAM Design., , and . J. Comput., 3 (2): 37-47 (2008)A Multibit MAC Scheme using Switched Capacitor based 3C Multiplier for Analog Compute In-Memory Architecture., , , , , , and . ICECS 2022, page 1-4. IEEE, (2022)A Modified Gate Replacement Algorithm for Leakage Reduction Using Dual-Tox in CMOS VLSI Circuits., , and . VDAT, volume 382 of Communications in Computer and Information Science, page 146-152. Springer, (2013)