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Disambiguation of "Reis, André Inácio"

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Simple and accurate method for fast static currentestimation in cmos complex gates with interaction ofleakage mechanisms.

, , , , , and . ACM Great Lakes Symposium on VLSI, page 407-410. ACM, (2008)

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André Reis

André Reis

Andre Reis

Inácio Barros

Isabel Inácio

 

Other publications of authors with the same name

Routing Resistance Influence in Loading Effect on Leakage Analysis., , and . PATMOS, volume 5953 of Lecture Notes in Computer Science, page 317-325. Springer, (2009)Tool integration using the web-services approach., , , and . ACM Great Lakes Symposium on VLSI, page 337-340. ACM, (2005)Lithography analysis of via-configurable transistor-array fabrics., , and . NORCHIP, page 1-4. IEEE, (2012)Exact Benchmark Circuits for Logic Synthesis., , , , , , and . IEEE Des. Test, 37 (3): 51-58 (2020)Analytical logical effort formulation for minimum active area under delay constraints., , , and . SBCCI, page 1-6. IEEE, (2013)Read-polarity-once Boolean functions., , , and . SBCCI, page 1-6. IEEE, (2013)Fast disjoint transistor networks from BDDs., , , , , and . SBCCI, page 137-142. ACM, (2006)SOP based logic synthesis for memristive IMPLY stateful logic., , , and . ICCD, page 228-235. IEEE Computer Society, (2015)SIFU! - A Didactic Stuck-at Fault Simulator., , and . MSE, page 93-94. IEEE Computer Society, (2003)Self-checking test circuits for latches and flip-flops., , , and . IOLTS, page 210-213. IEEE Computer Society, (2011)