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Disambiguation of "Sansaloni, T."

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Scheme for Reducing the Storage Requirements of FFT Twiddle Factors on FPGAs.

, , , and . VLSI Signal Processing, 47 (2): 183-187 (2007)

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T Peters

T Frieberg

T Weber

T Hollemann

T Fauster

 

Other publications of authors with the same name

Scheme for Reducing the Storage Requirements of FFT Twiddle Factors on FPGAs., , , and . VLSI Signal Processing, 47 (2): 183-187 (2007)Architectures for the Implementation of a OFDM-WLAN Viterbi Decoder., , , , and . J. Signal Process. Syst., 52 (1): 35-44 (2008)Design of Power and Area Efficient Digital Down-converters for Broadband Communications Systems., , , , and . J. Signal Process. Syst., 56 (1): 35-40 (2009)Design of high performance timing recovery loops for communication applications., , , and . SiPS, page 1-4. IEEE, (2006)Design and FPGA-Implementation of a High Performance Timing Recovery Loop for Broadband Communications., , , and . J. Signal Process. Syst., 56 (1): 17-23 (2009)Efficient Mapping of CORDIC Algorithm for OFDM-Based WLAN., , , , and . J. Signal Process. Syst., 52 (2): 181-191 (2008)Design of an efficient digital down-converter for a SDR-based DVB-S receiver., , , , and . ECCTD, page 256-259. IEEE, (2007)Distributed arithmetic radix-2 butterflies for FPGA., , and . ICECS, page 521-524. IEEE, (2001)FPGA-based radix-4 butterflies for HIPERLAN/2., , and . ISCAS (3), page 277-280. IEEE, (2002)Digit-Serial Complex-Number Multipliers on FPGAs., , and . VLSI Signal Processing, 33 (1-2): 105-115 (2003)